Discussion:
[OpenOCD-devel] [PATCH]: 22dbe9f efm32: Remove unnecessary code from EFM32 flash loader
gerrit
2017-06-27 14:43:14 UTC
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This is an automated email from Gerrit.

Jonas Norling (***@cyanconnode.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4169

-- gerrit

commit 22dbe9f41c09b9b6d4a6133812db278da5fdefa0
Author: Jonas Norling <***@cyanconnode.com>
Date: Mon Jun 26 14:54:00 2017 +0200

efm32: Remove unnecessary code from EFM32 flash loader

The instructions to enable writes in MSC_WRITECTRL and unlock the
flash in MSC_LOCK are not needed, because this is done by
efm32x_msc_lock() and efm32x_set_wren() before running the flash
loader.

The problem is that the MSC_LOCK register is in different locations on
EFM32 and EFR32, which is easy to handle in C code but tricky to
handle in pre-built assembly.

Change-Id: I72393f16d56fa02e14fbcc2b0fbb9057aaddece0
Signed-off-by: ***@cyanconnode.com

diff --git a/contrib/loaders/flash/efm32.S b/contrib/loaders/flash/efm32.S
index 25d6301..efd2072 100644
--- a/contrib/loaders/flash/efm32.S
+++ b/contrib/loaders/flash/efm32.S
@@ -39,19 +39,10 @@
*/

/* offsets of registers from flash reg base */
-#define EFM32_MSC_WRITECTRL_OFFSET 0x008
#define EFM32_MSC_WRITECMD_OFFSET 0x00c
#define EFM32_MSC_ADDRB_OFFSET 0x010
#define EFM32_MSC_WDATA_OFFSET 0x018
#define EFM32_MSC_STATUS_OFFSET 0x01c
-#define EFM32_MSC_LOCK_OFFSET 0x03c
-
- /* unlock MSC */
- ldr r6, =#0x1b71
- str r6, [r0, #EFM32_MSC_LOCK_OFFSET]
- /* set WREN to 1 */
- movs r6, #1
- str r6, [r0, #EFM32_MSC_WRITECTRL_OFFSET]

wait_fifo:
ldr r6, [r2, #0] /* read wp */
diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c
index 81c1a37..9143a52 100644
--- a/src/flash/nor/efm32.c
+++ b/src/flash/nor/efm32.c
@@ -589,17 +589,10 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf,

/* see contrib/loaders/flash/efm32.S for src */
static const uint8_t efm32x_flash_write_code[] = {
- /* #define EFM32_MSC_WRITECTRL_OFFSET 0x008 */
/* #define EFM32_MSC_WRITECMD_OFFSET 0x00c */
/* #define EFM32_MSC_ADDRB_OFFSET 0x010 */
/* #define EFM32_MSC_WDATA_OFFSET 0x018 */
/* #define EFM32_MSC_STATUS_OFFSET 0x01c */
- /* #define EFM32_MSC_LOCK_OFFSET 0x03c */
-
- 0x15, 0x4e, /* ldr r6, =#0x1b71 */
- 0xc6, 0x63, /* str r6, [r0, #EFM32_MSC_LOCK_OFFSET] */
- 0x01, 0x26, /* movs r6, #1 */
- 0x86, 0x60, /* str r6, [r0, #EFM32_MSC_WRITECTRL_OFFSET] */

/* wait_fifo: */
0x16, 0x68, /* ldr r6, [r2, #0] */
@@ -656,9 +649,6 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf,
/* exit: */
0x30, 0x46, /* mov r0, r6 */
0x00, 0xbe, /* bkpt #0 */
-
- /* LOCKKEY */
- 0x71, 0x1b, 0x00, 0x00
};

/* flash write code */

--

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