gerrit
2017-07-05 18:50:17 UTC
This is an automated email from Gerrit.
Moritz Fischer (***@ettus.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4177
-- gerrit
commit cc45dcddad683c5c8f0767838aabd2d178b2f443
Author: Moritz Fischer <***@ettus.com>
Date: Wed Jul 5 11:48:34 2017 -0700
zynq_7000: Add zynqpl_program command
This allows for programming the PL part of the Xilinx Zynq 7000
Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500
Signed-off-by: Moritz Fischer <***@ettus.com>
diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index 70a8616..d5ceefa 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -25,3 +25,22 @@ adapter_khz 1000
${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"
+
+pld device virtex2 zynq_pl.bs 1
+
+set XC7_JSHUTDOWN 0x0d
+set XC7_JPROGRAM 0x0b
+set XC7_JSTART 0x0c
+set XC7_BYPASS 0x3f
+
+proc zynqpl_program {tap} {
+ global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
+ irscan $tap $XC7_JSHUTDOWN
+ irscan $tap $XC7_JPROGRAM
+ runtest 60000
+ #JSTART prevents this from working...
+ #irscan $tap $XC7_JSTART
+ runtest 2000
+ irscan $tap $XC7_BYPASS
+ runtest 2000
+}
--
Moritz Fischer (***@ettus.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4177
-- gerrit
commit cc45dcddad683c5c8f0767838aabd2d178b2f443
Author: Moritz Fischer <***@ettus.com>
Date: Wed Jul 5 11:48:34 2017 -0700
zynq_7000: Add zynqpl_program command
This allows for programming the PL part of the Xilinx Zynq 7000
Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500
Signed-off-by: Moritz Fischer <***@ettus.com>
diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg
index 70a8616..d5ceefa 100644
--- a/tcl/target/zynq_7000.cfg
+++ b/tcl/target/zynq_7000.cfg
@@ -25,3 +25,22 @@ adapter_khz 1000
${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"
+
+pld device virtex2 zynq_pl.bs 1
+
+set XC7_JSHUTDOWN 0x0d
+set XC7_JPROGRAM 0x0b
+set XC7_JSTART 0x0c
+set XC7_BYPASS 0x3f
+
+proc zynqpl_program {tap} {
+ global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
+ irscan $tap $XC7_JSHUTDOWN
+ irscan $tap $XC7_JPROGRAM
+ runtest 60000
+ #JSTART prevents this from working...
+ #irscan $tap $XC7_JSTART
+ runtest 2000
+ irscan $tap $XC7_BYPASS
+ runtest 2000
+}
--