[OpenOCD-devel] [PATCH]: 6a256cf openrisc: add smp tap type config

[gerrit]

This is an automated email from Gerrit.

Stafford Horne (***@gmail.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4096

-- gerrit

commit 6a256cf55225c52b6e52f44556c772b449b33076
Author: Stafford Horne <***@gmail.com>
Date: Tue Apr 4 05:53:30 2017 +0900

openrisc: add smp tap type config

By setting TAP_TYPE VTAG_SMP two cpu targets will be setup.

This works with a de0 nano multicore. Also, the advanced debug
interface used by openrisc already support multicore debugging. This
helps expose how to use it.

Change-Id: I281296b18c9f34399c62b06c9d576be32fb09ee9
Signed-off-by: Stafford Horne <***@gmail.com>

diff --git a/tcl/target/or1k.cfg b/tcl/target/or1k.cfg
index 360a0dd..fe83280 100644
--- a/tcl/target/or1k.cfg
+++ b/tcl/target/or1k.cfg
@@ -14,7 +14,25 @@ if { [info exists TAP_TYPE] } {
}

# Configure the target
-if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
+if { [string compare $_TAP_TYPE "VJTAG_SMP"] == 0 } {
+ if { [info exists FPGATAPID] } {
+ set _FPGATAPID $FPGATAPID
+ } else {
+ puts "You need to set your FPGA JTAG ID"
+ shutdown
+ }
+
+ jtag newtap $_CHIPNAME cpu -irlen 10 -expected-id $_FPGATAPID
+
+ set _TARGETNAME $_CHIPNAME.cpu
+ target create $_CHIPNAME.cpu0 or1k -coreid 0 -endian $_ENDIAN -chain-position $_TARGETNAME
+ target create $_CHIPNAME.cpu1 or1k -coreid 1 -endian $_ENDIAN -chain-position $_TARGETNAME
+
+ tap_select vjtag
+
+ target smp $_CHIPNAME.cpu0 $_CHIPNAME.cpu1
+
+} elseif { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
if { [info exists FPGATAPID] } {
set _FPGATAPID $FPGATAPID
} else {

--