[OpenOCD-devel] [PATCH]: 6312596 openrisc: Enable stopping debug unit on all traps

[gerrit]

This is an automated email from Gerrit.

Stafford Horne (***@gmail.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4094

-- gerrit

commit 6312596cd73c2b7b8a8949a9de814098f8fdf77f
Author: Stafford Horne <***@gmail.com>
Date: Sun Apr 9 06:52:03 2017 +0900

openrisc: Enable stopping debug unit on all traps

The original code only enabled traps if sw breakpoints were enabled, but
this means we wont break on single stepping. Enable so single stepping
and software breakpoints work.

This means we can remoke an unused util function too.

Also, it mentions the kernel relies on l.trap instructions, but thats not
longer true as far as I can see.

Change-Id: If62193f5382717d5f8b67b8aeb5100035d0046e8
Signed-off-by: Stafford Horne <***@gmail.com>

diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c
index 3895ddf..625b4ef 100644
--- a/src/target/openrisc/or1k.c
+++ b/src/target/openrisc/or1k.c
@@ -773,19 +773,6 @@ static int or1k_soft_reset_halt(struct target *target)
return ERROR_OK;
}

-static bool is_any_soft_breakpoint(struct target *target)
-{
- struct breakpoint *breakpoint = target->breakpoints;
-
- LOG_DEBUG("-");
-
- while (breakpoint)
- if (breakpoint->type == BKPT_SOFT)
- return true;
-
- return false;
-}
-
static int or1k_resume_or_step(struct target *target, int current,
uint32_t address, int handle_breakpoints,
int debug_execution, int step)
@@ -839,11 +826,8 @@ static int or1k_resume_or_step(struct target *target, int current,
debug_reg_list[OR1K_DEBUG_REG_DMR1] &= ~(OR1K_DMR1_ST | OR1K_DMR1_BT);

/* Set traps to be handled by the debug unit in the Debug Stop
- Register (DSR). Check if we have any software breakpoints in
- place before setting this value - the kernel, for instance,
- relies on l.trap instructions not stalling the processor ! */
- if (is_any_soft_breakpoint(target) == true)
- debug_reg_list[OR1K_DEBUG_REG_DSR] |= OR1K_DSR_TE;
+ Register (DSR). This allows breakpoints and single stepping to work */
+ debug_reg_list[OR1K_DEBUG_REG_DSR] |= OR1K_DSR_TE;

/* Write debug registers (starting from DMR1 register) */
retval = du_core->or1k_jtag_write_cpu(&or1k->jtag, OR1K_DMR1_CPU_REG_ADD,

--