gerrit
2017-05-12 14:57:39 UTC
This is an automated email from Gerrit.
Greg Savin (***@imgtec.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4134
-- gerrit
commit 0ec1e5c099017bc36d72d10e0990a2f4ecd4c821
Author: Greg Savin <***@imgtec.com>
Date: Fri May 12 10:50:25 2017 -0400
On some MIPS systems, a final SYNC is necessary to flush pending DSEG
transactions. For example, systems with a 2:1 bus ratio. Omitting the
SYNC works on some cores, but others will not flush the last DSEG transactions,
so SYNC is necessary in the general case.
Change-Id: I5535d58ba248c6fa783acf1b3906f6c9de25051a
Signed-off-by: Greg Savin <***@imgtec.com>
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 790c8dc..1a526a7 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -465,6 +465,7 @@ int mips32_pracc_read_u32(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t
pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT,
MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET, 15)); /* sw $8,PRACC_OUT_OFFSET($15) */
pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* move COP0 DeSave to $15 */
@@ -525,6 +526,7 @@ int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size
pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */
pracc_add_li32(&ctx, 9, ejtag_info->reg9, 0); /* restore $9 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */
@@ -566,6 +568,7 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info, uint32_t *val, uint32_t cp0_r
MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET, 15)); /* store $8 to pracc_out */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */
pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 8, UPPER16(ejtag_info->reg8))); /* restore upper 16 bits of $8 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */
@@ -635,6 +638,7 @@ static int mips32_pracc_synchronize_cache(struct mips_ejtag *ejtag_info,
pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */
@@ -900,6 +904,7 @@ int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs)
MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + 4, 1));
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 1, 31, 0)); /* move COP0 DeSave to $1, restore reg1 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 15, 31, 0)); /* load $15 in DeSave */
--
Greg Savin (***@imgtec.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4134
-- gerrit
commit 0ec1e5c099017bc36d72d10e0990a2f4ecd4c821
Author: Greg Savin <***@imgtec.com>
Date: Fri May 12 10:50:25 2017 -0400
On some MIPS systems, a final SYNC is necessary to flush pending DSEG
transactions. For example, systems with a 2:1 bus ratio. Omitting the
SYNC works on some cores, but others will not flush the last DSEG transactions,
so SYNC is necessary in the general case.
Change-Id: I5535d58ba248c6fa783acf1b3906f6c9de25051a
Signed-off-by: Greg Savin <***@imgtec.com>
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 790c8dc..1a526a7 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -465,6 +465,7 @@ int mips32_pracc_read_u32(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t
pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT,
MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET, 15)); /* sw $8,PRACC_OUT_OFFSET($15) */
pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* move COP0 DeSave to $15 */
@@ -525,6 +526,7 @@ int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size
pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */
pracc_add_li32(&ctx, 9, ejtag_info->reg9, 0); /* restore $9 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */
@@ -566,6 +568,7 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info, uint32_t *val, uint32_t cp0_r
MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET, 15)); /* store $8 to pracc_out */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */
pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 8, UPPER16(ejtag_info->reg8))); /* restore upper 16 bits of $8 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */
@@ -635,6 +638,7 @@ static int mips32_pracc_synchronize_cache(struct mips_ejtag *ejtag_info,
pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */
@@ -900,6 +904,7 @@ int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs)
MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + 4, 1));
pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 1, 31, 0)); /* move COP0 DeSave to $1, restore reg1 */
+ pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); /* ensure flush of DSEG transactions */
pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */
pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 15, 31, 0)); /* load $15 in DeSave */
--