gerrit
2017-05-20 13:56:49 UTC
This is an automated email from Gerrit.
Matthias Welwarsky (***@welwarsky.de) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4142
-- gerrit
commit d5934b88caa5c3e81d6b77a73a3c031569e4cece
Author: Matthias Welwarsky <***@sysgo.com>
Date: Thu Apr 6 08:47:03 2017 +0200
cortex_a: faster debug init
Change-Id: Idc6dcd2bda95f7994852df4ae2a588976f4c9010
Signed-off-by: Matthias Welwarsky <***@sysgo.com>
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 5d90e34..672a300 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -206,23 +206,27 @@ static int cortex_a_init_debug_access(struct target *target)
/* lock memory-mapped access to debug registers to prevent
* software interference */
- retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
+ retval = mem_ap_write_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_LOCKACCESS, 0);
if (retval != ERROR_OK)
return retval;
/* Disable cacheline fills and force cache write-through in debug state */
- retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
+ retval = mem_ap_write_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_DSCCR, 0);
if (retval != ERROR_OK)
return retval;
/* Disable TLB lookup and refill/eviction in debug state */
- retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
+ retval = mem_ap_write_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_DSMCR, 0);
if (retval != ERROR_OK)
return retval;
+ retval = dap_run(armv7a->debug_ap->dap);
+ if (retval != ERROR_OK)
+ return retval;
+
/* Enabling of instruction execution in debug mode is done in debug_entry code */
/* Resync breakpoint registers */
--
Matthias Welwarsky (***@welwarsky.de) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4142
-- gerrit
commit d5934b88caa5c3e81d6b77a73a3c031569e4cece
Author: Matthias Welwarsky <***@sysgo.com>
Date: Thu Apr 6 08:47:03 2017 +0200
cortex_a: faster debug init
Change-Id: Idc6dcd2bda95f7994852df4ae2a588976f4c9010
Signed-off-by: Matthias Welwarsky <***@sysgo.com>
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 5d90e34..672a300 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -206,23 +206,27 @@ static int cortex_a_init_debug_access(struct target *target)
/* lock memory-mapped access to debug registers to prevent
* software interference */
- retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
+ retval = mem_ap_write_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_LOCKACCESS, 0);
if (retval != ERROR_OK)
return retval;
/* Disable cacheline fills and force cache write-through in debug state */
- retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
+ retval = mem_ap_write_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_DSCCR, 0);
if (retval != ERROR_OK)
return retval;
/* Disable TLB lookup and refill/eviction in debug state */
- retval = mem_ap_write_atomic_u32(armv7a->debug_ap,
+ retval = mem_ap_write_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_DSMCR, 0);
if (retval != ERROR_OK)
return retval;
+ retval = dap_run(armv7a->debug_ap->dap);
+ if (retval != ERROR_OK)
+ return retval;
+
/* Enabling of instruction execution in debug mode is done in debug_entry code */
/* Resync breakpoint registers */
--